16-Bit CPU on Logisim

 

Single Cycle Processor Design

ALU Design

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For the ALU design, Idid not use the built in aritmethic library. Instead Idesigned each tool(adder, subtractor, multiplier and shifter) meyself.

Register File

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Splitter

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This unit is responsible for the separation of the opcode, Rs, Rt, Rd, shamt and I[0:15] which determines the type of the function.

Control Unit

Firstly, the Control Unit takes the first two bits of the opcode to decide whether its R-type, I-type, mult or my function. Then the remaining 4 bits determine which function is selected. The selected function changes the control signals as demonstrated in the Control Signals table below. For instance, when we use the addition operation, Memtoread value becomes low. When a function is selected, the control unit changes the ALU opcode for each function. To do so we use the multiplexers just like if/else condition loops. Our control Unit design is a bit long and could be optimized.

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CPU Design

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Table of Control Signals

Instruction

Type

RegDst ALUSrc Memto

Reg

RegWrite Mem

Read

Mem

Write

Branch ALUOp

(3:0)

add 1 0 0 1 0 0 0 0000
sub 1 0 0 1 0 0 0 0001
and 1 0 0 1 0 0 0 0011
or 1 0 0 1 0 0 0 0100
slt 1 0 0 1 0 0 0 0111
load 0 1 1 1 1 0 0 0000
store 0 1 0 0 0 1 0 0000
addi 0 1 0 1 0 0 0 0000
beq 0 0 0 0 0 0 1 0001
blez 0 1 0 0 0 0 1 0001
mult 0 0 0 0 0 0 1 0010
mflo 0 0 0 1 0 0 0 1001
Sll 1 0 0 0 0 0 0 0110
mfhi 0 0 0 1 0 0 0 1000

The Assembly Code

The Assembly Code Address of Instruction Instruction Machine Code
addi $0, $0, 0 00100000000000000000000000000000 20000000
addi $1, $1, 0 00100000001000010000000000000000 20210000
addi $2, $2, 4 00100000010000100000000000000100 20420004
addi $3, $3, 0 00100000011000110000000000000000 20630000
addi $4, $4, 4 00100000100001000000000000000100 20840004
beq $3, $4, 9 00010000100000110000000000001001 10830009
lw $5, 0($1) 10001100001001010000000000000000 8C250000
lw $6, 0($2) 10001100010001100000000000000000 8C460000
mult $5, $6 01100000101001100000000000000000 60A60000
mflo $7 01001000000000000011100000000000 48003800
add $0, $0, $7 10000000000000000011100000000000 80003800
addi $1, $1, 1 00100000001000010000000000000001 20210001
addi $2, $2, 1 00100000010000100000000000000001 20420001
addi $3, $3, 1 00100000011000110000000000000001 20630001
j 5 00001000000000000000000000000101 08000005

The output value obtained from the assembly code is stored in the 0th register. You can check and see that it is A000. However, when we I use the built in multiplier tool the result is A082. This small error is probably caused by a defect in my self-designed multiplier.

You can find the Logisim file here : Download

3 thoughts on “16-Bit CPU on Logisim

  1. Its like you read my mind! You seem to understand a lot about this, such as you wrote the guide in it or something. I think that you just could do with a few percent to pressure the message house a little bit, however other than that, that is great blog. An excellent read. I’ll certainly be back.

  2. Thanks so much. This has been very helpful. The download link to the logisim file isn’t active. Will like to preview the cpu and learn from your build.

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